Inside the novo Architecture.

Non-Von has designed, fabbed, and deployed a new chip architecture that significantly increases processing power while dramatically reducing electrical consumption. The system works on any AI model, including all common development packages, and especially outperforms on the latest efficiency-focused models.

Put simply, we entirely removed the traditional monolithic (von Neumann) memory and caches, and instead paired each core with its own memory. This eliminates any memory bottleneck, and radically cuts the required power budget. Of course there are a lot of patent-protected designs going on under the hood to make all this work — we're keeping many of the details under wraps for now. For more, contact us at info@non-von.com.

In 2024 we fabricated the proof-of-concept chip — Non-Von's novo1 — and demonstrated it in a fielded commercial product, processing data at the edge. The far more powerful novo2 is planned for the end of 2026.

*novo2 simulated based on real performance of novo1 · ? data not available

AI systems typically run on GPUs that require high power consumption and immense electric budgets. Current software trends — sparsity, quantization, BitNet, FP4, EfficientNet, sparse transformers — alleviate some of that burden. GPUs were originally designed as screen-pixel processors and adapted for AI. By contrast, Non-Von's novo architecture was designed for AI from the ground up. Non-Von's native language is AI.

Another way to look at this difference is in how each hardware platform requires the math to occur. Below we show the difference in computational steps between a GPU/TPU and Non-Von's novo architecture. This depiction does not even include the additional memory–processor steps required of a GPU architecture — an additional computational and electrical burden that Non-Von's novo architecture and SDK eliminate.

Today's GPUs and TPUs require structured sparsity — matrices have to be pruned in specific column or row patterns to fit the silicon. The problem: real models naturally produce unstructured sparsity, where irrelevant values fall randomly throughout the matrix.

Engineers building today's models are severely constrained by today's hardware. Structured-sparsity requirements leave significant efficiency gains on the table. Non-Von's novo architecture processes unstructured models natively — letting engineers leverage any type of sparsity, something previously infeasible. The result: dramatically larger efficiency gains.

Non-Von can take any trained model and automatically implement it as a sparse, compacted system on silicon — including all common model development packages: PyTorch, ONNX, Keras, TensorFlow, SKLearn, NumPy, and many more. Results can be printed as custom Non-Von silicon or imprinted onto Non-Von's mass-produced programmable AI accelerator boards.

Under the hood, our SCULPT toolchain — Sparse Compact Ultra-Low Power Toolset — rewrites the model to take maximal advantage of Non-Von hardware properties, with just a few lines of code. The outcome: up to 100x better power efficiency on tasks ranging from deep-learning visual recognition to transformer-based chatbots (Hokenmaier et al., 2024).

For years our founders built innovative (and sparse) AI models. They recognized that today's hardware would never take full advantage of the efficiencies baked into the software. So they built the technology that would. That technology became Non-Von.

The industry is racing toward the same insight. Neural Magic and Cerebras pursue sparsity. NVIDIA's FP4 and Microsoft's BitNet pursue quantization. DeepSeek showed software can re-shape transformers around hardware. Non-Von was built from the ground up for all of it — enabling both ultra-low-power IoT devices and full-scale server farms that run faster while using vastly less power.